Here's a look at the future: AMD is said to work on a data center CPU that uses stacked arrays, one on top of the other, to get potentially huge core density or bandwidth between cores / memory.
Two prominent AMD leakers (@patrickschur_ i @execufix) have published news of the new chip, known as Milan-X. As a reference, Milan is the code name for AMD's latest Epyc server chips, based on the Zen 3 architecture.
AMD is working on a new CPU (codenamed Milan-X) that will use stacked arrays. 😏May 25, 2021
Does this mean that Zen 3 will see a renewal stacked someday in the future, or is the Milan part less a direct reference to Zen 3 in the data center and even more so the generation of Epyc chips? Rumors suggest that Zen 3 will probably play some role in the newly stacked chips.
Either way, it’s a seriously exciting prospect, even if it’s not yet aimed at our gaming computers.
I say that again, because surely the stacked arrays will end up becoming our gaming platforms. It makes sense to increase bandwidth and kernel count capabilities in data centers, especially with this technology, but with AMD and Intel both considering 3D stacking technologies, it seems inevitable even on the desktop.
The latest Epyc Milan processors offer up to 64 Zen 3 cores, split between eight computing chips and all connected to a central I / O chip. Stacked matrices, even less, could produce a very high core count, if this was really flat and properly refrigerated, although Says Videocardz its sources cite the change as a move to increase bandwidth.
Stacked chips can be much closer to each other than many chips next to each other and can be connected to each other or to another important silicon, inherently through the 3D packaging process, such as now via Silicon Vias or TSV. Therefore, there is more bandwidth available and potentially lower latencies between cores and memory.
For the most part, stacked matrices are usually high-performance matrices on a lower-performance silicon, but the door is open to other uses and combinations if the thermal load can be properly managed. Heterogeneous and mixed chipping computing offers many possibilities with stacking technology.
And what does AMD say about it officially? Well, according to CEO Lisa Dr in one recent transcript of JP Morgan events: "Stacking 3D chips is definitely on the roadmap". So that's it.
Intel also works on innovative packaging technologies, and its Intel Xe HPC chip, Ponte Vecchio, uses multiple 3D-stacked arrays (Foveros).
Games tend to favor speed over high kernel count or massive bandwidth, but that doesn’t mean we’re not all interested in having even more kernels and desktop capacity. Currently, the Ryzen 9 5950X exceeds 16 cores, which is fine, I guess.