Intel matches node-by-node rival, TSMC, with its new process naming convention, but it has also launched the first shot in the race for subanometer terminology. Below 1nm, we are moving into what is now called the semiconductor angstrom era.
Pat Gelsinger, president of the Intel Accelerated event, has presented a detailed process roadmap for his future nodes, all linked to a new way of referring to them. “We are accelerating our innovation roadmap to ensure we are on a clear path to leadership in process performance in 2025,” he says.
Gelsinger goes on to point out that Intel "will be relentless in our pursuit of Moore's law and our path to innovating with silicon magic."
You must love the way Gelsinger talks about his company now that he’s back and in the top spot. I can't imagine Bob Swan or Brian Krzanich ever talking about "the magic of silicon" and it's refreshing to have a little passion behind it with Intel's latest CEO.
This acceleration and re-marketing is also read as a smart move with Intel pushing its IDM 2.0 strategy and launching its contract casting business to rival TSMC. And what better way to measure yourself against the competition than by aligning your node name conventions with yours?
The industry has been talking about changing the way it talks about process nodes for a while, with nanometric terminology — once used to indicate the gate length of a transistor — which means less and less as time passes. Since transistors became three-dimensional, with the move to FinFET (or Tri-Gate in Intel terminology) in 2011, a one-dimensional measurement has become completely irrelevant.
This has meant that Intel is looking further and further back. Through its manufacturing partner, TSMC, AMD has been able to display 7nm CPUs nominally, while Intel desktop chips still remain on an old 14nm node.
But, as we have regularly pointed out here in PC Gamer, when it comes to transistor density, The 10 nm Intel node is much more similar to the Nm TS7 node, or 7 nm.
That’s why Intel is forgetting all this nanometers, and from the enhanced SuperFin node that forms the basis of the upcoming Alder Lake CPUs, it will use a new convention. The first will be "Intel 7", which is the new name for the nominally enhanced 10 nm SuperFin node, and is adapted to TSMC's N7 process.
Intel 7 is in volume production right now and Intel claims to give it a new name just because the 10-15% per watt performance this node is giving compared to the previous 10nm SuperFin. This is the kind of perfect leap you could expect from a new process, and Intel is now marketing it as such.
After that, we played "Intel 4", which was previously known as 7 nm and was aligned with TSMC's N4 process, then we get "Intel 3" and you can guess which rival node it is. directs face to face.
Intel describes the advanced roadmap in a little more detail:
- Intel 7 provides an approximate 10% to 15% increase in performance per watt over the Intel SuperFin of 10 nm, based on FinFET transistor optimizations. Intel 7 will appear in products such as Alder Lake for customers in 2021 and Sapphire Rapids for the data center, which is expected to be in production in the first quarter of 2022.
- Intel 4 fully embraces EUV lithography to print incredibly small functions with ultra-short wavelength light. With an approximate 20% increase in performance per watt, along with area improvements, Intel 4 will be ready for production in the second half of 2022 for products to be shipped in 2023, including Meteor Lake for the customer and Granite Rapids for the data center.
- Intel 3 takes advantage of other FinFET optimizations and increases the EUV value for an approximate 18% performance per watt compared to Intel 4, along with additional improvements in the area. Intel 3 will be ready to start manufacturing products in the second half of 2023.
- Intel 20A opens the angstrom era with two innovative technologies, RibbonFET and PowerVia. RibbonFET, Intel's implementation of a global transistor, will be the company's first new transistor architecture since it pioneered FinFET in 2011. The technology provides faster transistor switching speeds while achieving the same disc current that several fins in a smaller footprint. PowerVia is the industry’s first deployment for the first time in Intel’s industry, optimizing signal transmission by eliminating the need for power routing on the front of the wafer. Intel 20A is expected to accelerate in 2024.
- 2025 and beyond: Beyond Intel 20A, Intel 18A is already in development in early 2025 with refinements to RibbonFET that will offer another major leap in transistor performance. Intel is also working to define, build and deploy the next generation High NA EUV, and hopes to receive the industry’s first production tool. Intel is working closely with ASML to ensure the success of this industry advancement beyond the current generation of EUVs.
Certainly, the whole idea is less for us and more about marketing to potential customers for your fledgling foundry business. Although we hope it becomes clearer where different process nodes are put online when we talk about new chips from different manufacturers.
After that, this is where things get super interesting, because beyond the Intel 3 products that are shipped in late 2023, we move on to a whole new naming convention. This is the industry moving towards an era nominally less than 1 nm, with the name "Intel 20A" giving its first new process node of the semiconductor angstrom era in the first half of 2024.
Although this may be where the simplified convention of naming Intel nodes gets complicated again. An angstrom is literally a unit of subanometric measurement, with an angstrom equal to 0.1 nm. But Intel is very wrong to point out that while the "A" of "Intel 20A" means angstrom, it is purely a name, not a measure. So, to be clear, Intel 20A is not a process that incorporates transistors that measure 2nm in terms of its gate length.
These new chips from the angstrom era not only come with a new naming convention, which I'm sure Intel will hope to achieve, but will also incorporate Intel's first transistor design since this FinFET. of 22nm in 2011. RibbonFET, also known as NanoSheet, or Gate All Around (GAA), will land with Intel 20A in 2024. It is a transistor design that should speed up switching (from 0s to 1s), in addition to power meet the power requirements of modern CPUs in an increasingly smaller, densely packaged environment.
Intel 20A will also incorporate a new power supply method, called PowerVia. This, in itself, will offer the three-dimensional chips of tomorrow something called "back power supply" that optimizes against leaks and for signal transmission eliminating the need to have a power routing to the front part of a given wafer.
All of this is a super technological manufacturing process style and a bit of a future. But the short is that Intel aims to have a process performance per watt by the time its Intel 18A node launches in 2025. Although Intel representatives want to point out that it’s a a lot something different from having products with performance leadership: you expect to have them much sooner.